• Number Systems and Conversions
• Combinational Circuits - Design and Analysis
• Sequential Circuits – Counters, Shift Registers, Sequence Detectors - Design and Analysis
• Timing Parameters
• Finite State Machines

• Introduction to CMOS Technology
• CMOS Fundamentals
• CMOS Invertor Characteristics
• CMOS Fabrication Process
• CMOS Circuit Design Basics
• CMOS Power Consumption
• Low Power Design Techniques

• Introduction to FPGA Technology
• FPGA Architecture Basics
• Logic Blocks and Configurable Logic Blocks (CLBs)
• Interconnects and Routing Resources
• Input/Output Blocks (IOBs)
• Clock Management Resources
• Xilinx FPGA Architecture, Families and Series
• Introduction to Xilinx-specific resources (e.g., Slice, LUT, BRAM)
• Intel FPGA Architecture, Families and Series
• Introduction to Intel-specific resources (e.g., LE, ALM, M20K)
• Configuration methods (serial, parallel, JTAG)
• High-Speed Transceivers
• Hard IP Cores

• Introduction to UNIX-based Systems
• Directory Structure and File System Navigation
• Essential Utilities and Commands
• Introduction to Vi Text Editor
• Introduction to Version Control System
• Git Basics
• Branching and Merging
• Collaborative Development with Git
• Git Workflows in EDA Projects
• Git for Bug Tracking and Issue Management

• Verilog Fundamentals
• Data Types and Operators in Verilog
• Blocking vs. Nonblocking Statements
• Behavioral Modeling Techniques
• Combinational and Sequential Logic Design
• Synthesizable RTL Design Principles
• RTL Coding Guidelines
• Timing Controls in RTL Design
• Compiler Directives and System Tasks
• Tasks and Functions in Verilog
• Modeling Delays in Verilog
• Effective Verification Strategies in Verilog
• File I/O Operations in Testbenches
• Self-Checking Testbench Constructs
• Real-World Applications and Case Studies

• Memory Access Protocols
• Asynchronous FIFO Design
• Handling Clock Domain Crossing issues
• AMBA Protocol Overview – AXI, AXIS, AXIL, APB
• Mini Project: Design and Verification Using Memories Peripherals and AXI
• UART Protocol
• I2C Protocol
• SPI Protocol

• Introduction to Tcl scripting language
• Tcl applications in FPGA design
• Basic syntax, variables, and data types in Tcl
• Automation possibilities with TCL
• Control structures, loops, and conditional statements in Tcl
• Procedures, functions, and best practices
• File I/O operations in Tcl
• Tcl for synthesis processes
• Implementing FPGA designs using Tcl scripts
• Place-and-route automation and scripting strategies
• Integrating Tcl scripts with FPGA synthesis tools
• Tcl scripting for IP integration
• TCL Script for FPGA Build

• Overview of IP Cores
• Xilinx IP Catalog and Intel IP MegaWizard
• Creating Custom IP Cores
• Integrating IP Cores into FPGA Designs
• System Design with IP Blocks
• IP-XACT and IP Packaging
• Utilizing ChipScope and Signal Tap
• Common Debugging Strategies
• Debugging Real-world FPGA Designs

• Introduction to Timing Analysis
• Overview of the importance of timing analysis in FPGA design.
• Fundamentals of understanding and evaluating timing constraints.
• Deep dive into setting constraints for optimizing design performance.
• Techniques for balancing setup and hold times.
• Clock Domain Crossing (CDC) Challenges and Solutions
• Implementing effective CDC solutions to ensure proper synchronization.
• Exploration of the place and route phase in the FPGA design flow.
• Techniques for efficient utilization of resources during placement.
• Process of generating the bitstream for configuring the FPGA.
• In-depth analysis of static timing to validate design performance.
• Interpretation of timing reports and adjustment of constraints for closure.

• Utilize ChipScope and Signal Tap FPGA signal analysis.
• Apply common debugging strategies
• Navigate and troubleshoot complexities in real-world FPGA designs.
• Leverage hardware debugging techniques for efficient issue identification.
• Implement effective system-level debugging strategies.
• Troubleshoot communication interfaces in FPGA systems.
• Use a storage oscilloscope for in-depth hardware debugging.
• Analyze waveforms and signal characteristics to identify and resolve hardware-related issues.

• Overview of Embedded Systems:
• Applications in Real-world Scenarios
• MicroBlaze Processor Architecture
• NIOS-II Processor Architecture
• Features and Capabilities Comparison
• EDK (Embedded Development Kit) Workflow
• Building Embedded Systems with MicroBlaze and NIOS-II
• Processor Configuration and Initialization
• Memory Configuration
• System Integration
• Debugging Techniques
• Overview of Peripherals
• Standard Peripheral Integration
• Custom Peripheral Design
• Bus Communication Protocol (e.g., AXI, Avalon)

• Transition from College to Corporate
• Interpersonal Skills and Effective Presentation
• Email Etiquette and Professional Writing
• Resume Writing and Job Application Skills
• Mock Interviews: Technical and HR Rounds
• Interview Skills: Group Discussions and HR Round Preparation

• Design Specification Analysis
• Creating the Design Architecture
• Partitioning the Design
• RTL Coding in Verilog
• RTL Functional Verification using Verilog HDL
• RTL Synthesis
• Building Regression Test Suite
• Coverage Analysis and Coverage Closure
• Documentation and Project Presentation

Note: Assignments, tests, and interviews will be conducted in conjunction with each course module
I. Aptitude Tests - 10 Tests
Rigorous Aptitude Assessments to Gauge Problem-Solving Skills and Analytical Abilities

II. Assignments, Technical Tests, and Interviews
Advanced Digital Systems:
Assessing Knowledge in Complex Digital System Design and Analysis
CMOS Basics:
Evaluating Fundamental Understanding of CMOS Technology and Applications
Essentials of Linux for Electronic Design Automation:
Testing Proficiency in Linux Environment and EDA Tools Utilization
Advanced Verilog for RTL Design and Verification:
Practical Assessment of Verilog Skills for RTL Design and Verification
FPGA timing ClosurevStatic Timing Analysis
Evaluating Mastery in Timing Analysis Concepts and Techniques
TCL Scripts for FPGA design
Assessing Scripting Skills for Automation in EDA Processes
Essential Off-Chip Protocols for RTL Design and Verification (AMBA AXI, UART, I2C, SPI):
Proficiency Evaluation in Key Off-Chip Protocols for VLSI Communication
Essential On-Chip Protocols for RTL Design and Verification (AMBA APB, AXIS, AXIL, AXI)
In-Depth Understanding and Application of On-Chip Protocols
IP Integration
Assessing IP Integration Skills for FPGA Design
FPGA Implementation – Physical Design
In-Depth Understanding of FPGA implementation (Place, Route and Bitstream Generation)
11. On board debugging and Trouble shooting
Assessing debugging skill using ILA, VIO and Signal Tap